Delta-sigma modulation is used widely throughout signal processing applications. Any application that requires signal modulation may generally take advantage of delta-sigma modulation techniques. The basic digital-to-analog and analog-to-digital conversion capabilities of a delta-sigma modulator along with its superior linearity and noise-shaping attributes find extensive functionality in digital and analog signal processing for audio or speech applications as well as telecommunication and signal acquisition technologies. Delta-sigma modulation can be found in audio conversion applications for communication transmission, ISDN applications, modems, audio play-back equipment such as compact disc (CD) or digital versatile/video disc (DVD) players, signal or frequency synthesizers, or any other application or equipment which utilizes modulation or demodulation.
In its basic block components, as shown in FIG. 1A, a first-order analog delta-sigma modulator comprises summer 100, integrator 101, Analog-to-Digital Converter (ADC) 102, which is set to a specific reference signal, and feedback loop 103 containing Digital-to-Analog Converter (DAC) 104 to provide the feedback signal. ADC 102 is typically configured as a comparator, which produces a quantized output using a set reference signal, while DAC 104 typically matches the bit size resolution of ADC 102 and uses the same reference signal. Low resolution ADCs and DACs are typically used because they are easier to implement at the necessary high sampling rates. In a general example using a 1-bit ADC, there will be a considerable amount of quantization error as a continuous analog signal is converted into a 1-bit digital signal limited by the fixed reference signal. This 1-bit output is then typically converted back to an analog signal through DAC 104 in feedback loop 103 and subtracted from the analog input signal at summer 100. The resulting error output of summer 100 is then usually integrated and fed back into the 1-bit ADC 102. This differential error feedback process generally keeps the output proportional to the input over the average of large sampling intervals.
A first order delta-sigma modulator may also be built in the digital domain. In this digital domain circuit, the input would typically be a large wordlength digital number that is quantized to a smaller wordlength number at the output (typically one bit). In the digital domain circuit, ADC 102 is normally replaced by a quantizer that truncates the lower least significant bits (LSBs) of the output of the digital integrator. Because this circuit is meant to operate in the digital domain, there will be no DAC 104 in the feedback path.
FIG. 1B illustrates the digital domain version of a delta-sigma modulator. The output signal is subtracted from the input signal at digital summer 110. The resulting signal is then integrated at digital integrator 111. The integrated signal is then quantized at quantizer 112 before being provided as output and as a feedback signal to digital summer 110.
For quantizing analog or digital signals, a delta-sigma modulator operates to quantize the signal at an extremely low resolution (e.g., 1-bit) using an extremely high sampling rate (e.g., 2 MHz). It is able to achieve the required resolution of Signal-to-Noise ratio (SNR) by exploiting two principles: (1) oversampling of the input signal to reduce the quantization noise floor introduced by the coarse quantizer; and (2) high pass noise shaping of this quantization noise to reduce this noise even further in the frequency band of interest.
The beneficial characteristics of the delta-sigma modulator due to oversampling result from application of the Nyquist Theorem. The Nyquist Theorem generally states that an input signal must be bandlimited to a frequency less than one-half of the sampling rate in order to avoid aliasing. In other words, the minimum sampling rate must be, at least, twice the input signal's bandwidth. This minimum sampling rate is known in the art as the Nyquist rate. Aliasing typically is the transposition of input frequency components greater than one-half of the Nyquist rate onto the lower frequencies. For example, with a sampling rate of 100 kHz, an input signal with frequency content from 0 to 60 kHz will transpose or overlap frequency components onto the input signal between 40 and 50 kHz. The addition of those aliased frequency components typically creates noise in the sampled signal and will generally prevent recovery of the information contained between 40 and 50 kHz in the original signal.
The quantization error resulting from the analog-to-digital conversion is typically known as quantization noise. Because of the complexity of this quantization noise, it is usually very difficult to accurately represent mathematically. In typical signal processing applications, the standard practice is to represent this quantization noise as white noise that is uncorrelated with the input. White noise is generally understood as noise that contains components across all frequencies and which is typically represented with a constant value in the frequency spectrum. This assumption simplifies the analysis for delta-sigma modulator design.
If white noise is sampled at a frequency of fs, all of its noise power falls into the frequency band of 0<=f<fs/2 due to aliasing of frequencies greater than the Nyquist rate. This effect typically leads to the well-known result of the quantization noise power spectral density being given by the formula:e2(f)=2ems2/fs=ems22τ  (1)where e2(f) is the power spectral density of the quantization noise, ems2 is the total quantization noise power, and τ is the sampling period, 1/fs. Equation 1 shows that a higher sampling rate reduces the power spectral density. In other words, oversampling may further reduce the noise floor as the sampling rate increases above the Nyquist rate. Consider, for example, a signal within a frequency band of interest of 0<=f<fo. The signal is sampled at a rate of fs. The example further assumes that the quantization error is sufficiently white, distributed uniformly, and uncorrelated to the signal frequency. In this scenario, the noise power falling into the band of interest can be represented by the formula:                               n          o          2                =                                            ∫              o              fo                        ⁢                                                            ⅇ                  2                                ⁡                                  (                  f                  )                                            ⁢                              ⅆ                f                                              =                                                    e                rms                            ⁡                              (                                                      2                                          f                      o                                                        ⁢                  τ                                )                                      =                                          ⅇ                rms                2                            OSR                                                          (        2        )            
Where no2 is the in-band noise power, 2fo is the Nyquist rate, τ is the encoding/sampling period, and OSR is the over sampling ratio calculated according to the formula:                     OSR        =                                            f              s                                      2              ⁢                              f                o                                              =                                    1                              2                ⁢                                  f                  o                                                      ⁢            τ                                              (        3        )            
As equations 2 and 3 provide, doubling the encoding/sampling frequency fs decreases the in-band noise by 3 dB. This reduction in noise corresponds to an increase in signal-to-noise ratio, which, in turn, increases the resolution.
The main benefit of the delta-sigma modulator architecture is generally the noise shaping function exhibited by its circuit design. In order to better view this favorable quality, one must normally examine the delta-sigma modulator in the frequency domain. FIG. 2 illustrates the frequency domain linearized model for a basic, first-order delta-sigma modulator. Summer 200 is already linearized. The integrator is typically given the frequency domain representation of analog filter 201. Analog filter 201 generally exhibits a transfer function inversely proportional to the input frequency. The quantizer is usually broken into two elements in the frequency domain. The first element is generally modeled as gain block 202, which is then usually followed by summer 203 which adds quantization noise 204 to the filtered/integrated signal. This configuration, which adds quantization noise 204 after analog filter 201, but before feedback loop 205, is generally important to the operation of the delta-sigma modulator.
Mathematical analysis of the frequency domain linearized model generally illustrates the noise shaping characteristics of the delta-sigma modulator. Assuming, for purposes of this example analysis, that gain block 202 is configured for a gain of one, the output of the delta-sigma modulator can generally be shown mathematically as:                     Y        =                                            (                              X                -                Y                            )                        f                    =                      N            q                                              (        4        )            Where Y represents the output of the modulator, X represents the input signal, f represents the frequency, and Nq represents the quantization noise. After solving equation 4 for the output signal, the frequency domain analysis may be shown by:                     Y        =                              X                          (                              f                +                1                            )                                +                                    N              q                        ⁢                          f                              (                                  f                  +                  1                                )                                                                        (        5        )            Examining equation 5 across the frequency spectrum generally confirms the theoretical noise shaping characteristic of the delta-sigma modulator. At 0 frequency, f=0 Hz, the output signal, Y, generally comprises the input signal X. As the frequency is increased, Y typically begins to include a greater amount of the quantization noise, Nq. Finally, at infinite frequency, f=∞, the output signal, Y, may comprise only the quantization noise, Nq. Therefore, at low frequencies, the quantization noise is generally suppressed with the delta-sigma modulator typically pushing the noise energy to higher frequency levels. Because the laws of physics require that energy must be conserved, the noise energy generally remains the same in total, with only its density being shifted or shaped to the higher frequencies, which are typically outside the frequency band of interest.
FIGS. 3 and 4 graphically show the effect of the delta-sigma modulator's noise shaping characteristics. FIG. 3 illustrates the general frequency domain representation of a modulator's response without noise shaping. With the assumption that the quantization noise may be typically represented as white noise, the frequency spectrum of the quantization noise is generally shown as a constant value across the entire frequency range. Without noise shaping, there is usually a large component of quantization noise interfering with the modulator's signal spectrum. FIG. 4 shows the expected theoretical results of the noise shaping characteristics of the delta-sigma modulator. At the lower frequencies, which include the entire frequency band of interest, the quantization noise has generally been suppressed by the high pass signal filtering effect of the delta-sigma modulator. However, the energy of that suppressed noise has typically been shifted or shaped to the higher frequencies. The result is a frequency band of interest which may have much of its noise filtered away.
Similar to other filter applications, higher-order delta-sigma modulators will typically produce better noise shaping qualities. Second, third, and fourth order delta-sigma modulators are generally common in the art and each exhibits progressively better noise shaping and noise response. The improved response can typically be represented mathematically by the formula:                               S          ⁡                      (            f            )                          =                              [                          2              ⁢                                                           ⁢                              sin                ⁡                                  (                                                            π                      ⁢                                                                                           ⁢                      f                                                              f                      r                                                        )                                                      ]                    n                                    (        6        )            
Where S(f) represents the frequency response of the delta-sigma modulator quantization noise, f, is the frequency variable, and fs is the sampling frequency. However, because general higher-order modulators usually require high-order feedback loops, instability has typically been seen in some high-order delta-sigma modulators.
One solution typically used to implement high-order delta-sigma modulators is the Multi-Stage Noise Shaping (MASH) architecture. Instead of unstable, high-order feedback loops, MASH architecture cascades multiple first-, second-, or a combination of first- and second-order delta-sigma modulators which feed the quantization error forward to the next cascaded level. In this configuration, as the output of each modulator is processed through differentiators and added to form the resulting modulated output, the quantization error signals of each preceding stage cancel out leaving only the quantization error value of the last delta-sigma modulator stage shaped by a high-order high pass filter. Because there are no high-order feedback loops, the MASH architecture has generally proven to be quite stable for multi-stage delta-sigma modulators. Therefore, the generally improved overall response of higher-order delta-sigma modulators can be reliably achieved.
FIG. 5 shows a linearized, hybrid, Z-Transform model of a MASH fourth-order delta-sigma modulator. Each stage of delta-sigma modulator typically comprises summer 50, quantizer 51, summer 52, which usually subtracts the intermediate digitized signal, and delay 53, represented in Z-Transform notation. The second through fourth stages also generally include a number of digital differentiators 54, represented in Z-Transform notation, corresponding to the stage level minus one. Therefore, stage two modulator 520 typically contains one digital differentiator 54 (i.e., 2−1=1), while stage four modulator 540 typically contains three digital differentiators 54 (i.e., 4−1=3). These cascaded digital differentiators usually shape the quantization noise of each stage prior to the final summing in summer 500. The noise canceling characteristics of the MASH architecture can generally be observed through mathematically processing a theoretical signal through delta-sigma modulator system 5. The digitized output signal of delta-sigma modulator system 5 typically comes from summer 500. The intermediate digitized output signals from each of the delta-sigma modulator stages are generally added together at summer 500 to form the final modulated output signal. From stage one modulator 510, stage one digitized signal A1 may be mathematically represented by the following formula:
 A1=N(z)+Q1(z)(1−Z−1)  (7)
Similarly, including the digital differentiators 54 in the later stages, stage two digitized signal A2 through stage four digitized signal A4 may typically be represented by the following formulae:A2=[−Q1(z)+Q2(z)(1−Z−1)](1−Z−1)=−Q1(z)(1−Z−1)+Q2(z)(1−Z−1)2  (8)A3=[−Q2(z)(1−Z−1)+Q3(z)(1−Z−1)](1−Z−1)2=−Q2(z)(1−Z−1)2+Q3(z)(1−Z−1)3  (9)A4=[−Q3(z)(1−Z−1)+Q4(z)(1−Z−1](1−Z−1)3=−Q3(z)(1−Z−1)3+Q4(z)(1−Z−1)4  (10)
Note that each stages quantization noise component, Qn(z), is passed to the subsequent stages as −Qn(z) by virtue of passing through the summers 52. Therefore, by adding the four intermediate digitized signals A1 through A4 at summer 500, the quantization noise terms of the first through third stages cancel out leaving delta-sigma modulator system 5's final output generally represented by the formula:Output=N(z)+Q4(z)(1−Z−1)4  (11)
Equation 11 illustrates that the quantization noise of the last state, Q4(z), is shaped by a fourth order high pass filter.
As suggested previously, in the analysis and design of delta-sigma modulators, an assumption is made that the quantization noise injected by the low-bit quantizer corresponds to white noise. In fact, this assumption is almost never true. In signal processing applications, which deal primarily with dynamic signals having either large amplitude or random, small amplitudes, the “busy-ness” of those signals may typically allow the quantization noise to approximate white noise. Therefore, in such instances, the white noise assumption may not lead to extensive unexpected spurious signals in the output. However, delta-sigma modulation of DC, periodic, or some manner of steady-state signals, many of which are regularly found in audio, speech, or frequency synthesizing applications, will generally not produce the good noise shaping and suppression predicted using the white noise assumption. One example of such signals in an audio context is the idle tones or periods of silence in audio signals. These idle signals represent DC, periodic, or, at a minimum, steady-state levels which may cause high noise levels or spurs to be injected into the baseband spectrum.
When such digital, steady-state, or periodic signals are modulated, correlations begin to form between the quantization noise and the input signal because of the periodic nature of the signals. As the input signal and noise begin forming correlations, it becomes increasingly difficult to separate the signal from the noise as the signal is processed. As a result, the correlations produce discrete spurious components in the output and reduce the modulator's overall effective noise suppression and dynamic range. To counteract this effect, the industry typically uses three different techniques: dithering, wider word length (in digital circuits), or higher order delta-sigma modulators.
Because the increased spurious signal content arises due to the correlations formed between the input signal and the quantization noise, dithering typically counteracts the correlation by essentially adding noise to the system at some point. The result of the added noise makes the quantization noise appear more white, which increases the effectiveness of the white noise assumption, by generally decreasing the correlations formed between the two signals. To implement dithering in a delta-sigma modulator, components must be added to the circuit which inject noise into the system. In an analog application, a noisy resistor or amplifier may generally be used to inject noise. In a digital application, a pseudo-random number generator may typically be added, which injects random “noise” signals into the system. Therefore, to implement dithering, the circuit size, complexity, and power requirement of the delta-sigma modulator must increase.
Another technique generally used in digital applications is to increase the word size of the digital modulator. By increasing the word length, the resolution typically becomes finer; that is, becomes smaller. As the resolution becomes smaller, the effective result generally pushes all of the spurious signal energy closer together. Spurious signal components typically arise at each multiple or harmonic of the resolution frequency, which is usually the sampling frequency divided by 2wordlength. Therefore, as the resolution becomes smaller, there will typically be more spurious signals over a given frequency range. This increase in spurious signal components generally begins to appear or act like white noise, thus effectively decorrelating the input signal from the quantization noise.
To implement an increased word size in a digital application, the components of the modulator must typically be redesigned. For instance, if a digital modulator begins with a 12-bit word length utilizing a 12-bit latch and 12-bit adders, increasing the word size to 20-bits would generally require substituting a 20-bit latch and 20-bit adders. This small change actually results in a very large increase in circuitry to accommodate the larger word length. Thus, implementing the increased word length also requires an increased circuit size and complexity.
The third technique, using a higher-ordered delta-sigma modulator, generally takes advantage of the inherent increase in noise shaping at the higher orders, as given in equation 6, to suppress the increased spurious signals due to the correlations between the input signal and the quantization noise. Also, the use of higher-order delta-sigma modulators has been shown to reduce the amount of correlation between the input and the quantization noise. As the technique suggests, using a higher-ordered delta-sigma modulator generally requires, at a minimum, the number of additional components required for a first-order modulator, for each additional order desired. Therefore, as with each of the preceding methods, using a higher-ordered delta-sigma modulator typically requires an increased circuit size and complexity.
One of the practical consequences of designing higher order delta-sigma modulators is that the quantization noise shaped to higher frequencies may reach very large signal powers because of the high order high pass noise shaping applied to the quantization noise. In theoretical design, the use of higher order delta-sigma modulation decorrelates its quantization noise with the input. However, in practice, circuit design problems arise due to the large signal power that peaks at fs/2. One such problem is that the fs clock signal can couple into sensitive bias circuits that power the signal path components thereby causing high-powered, out-of-band tones to demodulate down to baseband and severely degrade the SNR and spurious free dynamic range of the delta-sigma modulator.
Another commonly found problem in practical circuits is that components in a system using a delta-sigma modulator may cause the same above-described effect due to the second order intermodulation performance of these components. For example, if there are two high powered tones at 990 kHz and 995 kHz, a spur will appear at 5 kHz due to second order nonlinearity of a component. This component could be an amplifier in an audio application or a phase-frequency detector in a delta-sigma modulator-based fractional-N frequency synthesizer.
The problem with each of the preceding noise reduction techniques arises from the necessity to use additional components and circuitry. Delta-sigma modulators may typically be fabricated on a single integrated circuit substrate. Furthermore, an application specific integrated circuit could include a number of normally discrete components on the same integrated circuit substrate. Therefore, a delta-sigma modulator may share the same substrate area with other components such as an amplifier or a phase locked loop. Two generally valued and conserved resources on integrated circuits are area and power. Each of the three preceding noise reduction techniques requires the use of additional components. Adding components typically means using more space or area on an integrated circuit substrate, as well as requiring more current to drive them. The increased current requirement generally equates to a higher power requirement. Thus, the three noise reduction techniques currently used to enhance the performance of delta-sigma modulators each achieves its increased noise performance at the expense of the limited area and power for any given integrated circuit.